šŸ¦¾ Why SoCs (Systems-on-Chips) Are Becoming More Programmable

A Newsletter for Entrepreneurs, Investors, and Computing Geeks

Author

Emily EisenblƤtter
January 19, 2026

Happy Monday! Hereā€™s whatā€™s inside this weekā€™s newsletter:

  • Deep dive: How programmability is being designed into modern SoCs, with DSPs, reconfigurable logic, and chiplet-based approaches helping systems adapt to changing workloads after deployment.

  • Spotlights: A reframing of the quantum advantage debate toward definitions and usefulness, and AWS launching a European sovereign cloud with plans to expand its isolated infrastructure footprint across the EU.

  • Headlines: Strong AI-driven momentum in semiconductors, renewed debate and progress in quantum advantage and scaling, and major AI data center build-outs from Meta and Microsoft.

  • Readings: Semiconductor trends around HBM, NPUs, and secure manufacturing, quantum advances in cooling and defense readiness, progress in photonic modulators, and neuromorphic efficiency gains.

  • Funding news: A broad spread of financings across quantum and semiconductors, with only one round below $10M, highlighting sustained mid-stage deal activity.

  • Bonus: New U.S. policy efforts to shift a significant share of Taiwanā€™s chip supply chain to the U.S. and ramp up domestic chip production volumes through investment incentives and targeted tariffs.

This will be my last issue for now as Iā€™m off to new adventures šŸ’” Iā€™ll continue contributing Deep Dives for the newsletter and interviews for the blog. The amazing Future of Computing team will keep the newsletter active and publish it going forward ā¤ļø

Deep Dive: Why SoCs (Systems-on-Chips) Are Becoming More Programmable

What are systems-on-chips (SoCs)?

Engineers traditionally built systems-on-chips (SoCs), meaning single chips that integrate processors, accelerators, memory interfaces, and I/O, by selecting ASICs (fixed-function chips designed for a specific task), FPGAs (reconfigurable logic that can be rewired after manufacturing), DSPs (processors optimized for signal processing), or general-purpose processors based on known workloads and expected product lifetimes. Once manufactured, these systems were designed around the expectation that their core workloads and requirements would not change significantly.

That design model has weakened. Workloads, especially those shaped by AI, now evolve faster than silicon development cycles. Models change, standards shift, and deployment conditions often remain uncertain long after tape-out. As a result, SoC designers increasingly combine fixed-function logic with programmable or reconfigurable elements to accommodate change after deployment.

Why programmability matters in modern SoCs

Modern SoCs increasingly combine CPUs, GPUs, DSPs, NPUs, and sometimes reconfigurable fabrics. This reflects the difficulty of committing to one optimal architecture when workloads and standards are still in flux.

Programmable components make it possible to update algorithms, reassign workloads, or adapt to new protocols after deployment. In some cases, this flexibility may come from swapping in a programmable chiplet rather than redesigning a full system.

GPUs illustrate this trade-off between flexibility and power efficiency. They are highly programmable, but consume significant power. In embedded AI systems, designers often pair more fixed NPUs with programmable DSPs, balancing NPU efficiency for matrix math with DSP programmability and lower power than GPUs.

The role of DSPs in programmable SoCs

DSPs illustrate how programmability inside modern SoCs is used to manage variability in real-world signals that can be difficult to account for fully at design time.

Analog interfaces are difficult to fully specify in advance

As SoCs integrate more RF, sensor, and mixed-signal interfaces, they are exposed to noise, distortion, and variability that depend on environment, aging, and interference. These effects are hard to model exhaustively at design time and often change over a productā€™s lifetime.

DSPs sit closest to real-world signals

DSPs operate at the boundary between analog inputs and digital processing. Because they are programmable and operate in real time, they are well suited to handle adaptive filtering, calibration, and compensation without requiring hardware changes. In some systems, AI-based techniques assist by adjusting to changing conditions such as temperature drift or interference.

This does not imply that AI replaces classical signal processing. Deterministic algorithms remain well suited for tasks like fast Fourier transforms, while AI is applied where adaptivity is more valuable.

Reconfigurable approaches beyond DSPs

Beyond DSPs, designers are exploring coarse-grained reconfigurable arrays, embedded FPGAs, and FPGA-integrated AI engines. These options sit between fixed-function hardware and fully programmable logic, offering additional flexibility with efficiency trade-offs.

Their use depends strongly on ecosystem support, toolchain maturity, and integration with existing design flows, which remain uneven, particularly for newer reconfigurable approaches. As a result, they are generally used as complements rather than replacements.

Chiplets add another layer of flexibility by isolating fast-changing functions into separate components, allowing parts of a system to be updated while others remain stable. Embedded FPGAs offer a similar hedge, but designers weigh them carefully because reconfigurability adds area and cost.

Spotlights

ā€œQuantum advantage has likely been demonstrated through multiple large-scale random circuit sampling experiments that perform programmable computational tasks beyond feasible classical simulation, even if those tasks have no practical use.

Scientific skepticism persists largely because the benchmark tasks are contrived, verification relies on indirect proxies and extrapolation, and early experiments were partially matched by later classical simulations.

The debate now centers less on whether quantum devices exceeded classical capabilities and more on whether usefulness and intuitive computational value should be retroactively required for quantum advantage claims.ā€

ā€œToday, Amazon Web Services (AWS) announced the general availability of the AWS European Sovereign Cloud, a new, independent cloud for Europe entirely located within the EU, and physically and logically separate from other AWS Regions.

The AWS European Sovereign Cloudā€™s unique approach provides the only fully featured, independently operated sovereign cloud backed by strong technical controls, sovereign assurances, and legal protections designed to meet the needs of European governments and enterprises for sensitive data.

AWS also announced plans to extend the AWS European Sovereign Cloud footprint from Germany across the EU to support stringent isolation, in-country data residency, and low latency requirements.ā€

Related news:

Headlines


Last weekā€™s headlines featured strong AI-driven momentum in semiconductor revenues and manufacturing, renewed debate and progress around quantum advantage and scaling, large-scale AI data center build-outs from Meta and Microsoft.

šŸ¦¾ Semiconductors

āš›ļø Quantum

šŸ§  Neuromorphic

šŸ’„ Data Centers

šŸ“” Networking

šŸ¤– AI

Readings


This reading list covers semiconductor trends in HBM, NPUs, and secure manufacturing, quantum advances in cooling and military readiness, photonic modulators for positioning systems, and neuromorphic adoption and efficiency gains.

šŸ¦¾ Semiconductors

IEDM 2025 Round-Up (SemiAnalysis) (36 mins)

How and why to optimize NPUs (SemiEngineering) (12 mins)

āš›ļø Quantum

āš”ļø Photonic

šŸ§  Neuromorphic

šŸ’„ Data Centers

Data centers are amazing. Everyone hates them. (MIT Technology Review) (14 mins)

Funding News


Last weekā€™s rounds included several financings in quantum across early and mid stages, alongside mid-stage deals in semiconductors and one data-center round. Only one round came in below $10M.

Amount

Name

Round

Category

$4.2M

Diffraqtion

Pre-Seed

Quantum

$11M

Haiqu

Seed

Quantum

$20M

Project Eleven

Series A

Quantum

$22.5M

Fractile

Venture Round

Semiconductors

$30M

Quadric

Series C

Semiconductors

$60M

Equal1

Venture Round

Quantum

$65M

Accelsius

Series B

Data Centers

$86M

SpacemiT

Series B

Semiconductors

Bonus: U.S. Policy ā€“ Shifting 40% of Taiwanā€™s Supply Chain and Ramping Up Domestic Chip Production

This bonus section summarizes recent U.S. policy actions and trade measures aimed at reshaping semiconductor supply chains and increasing domestic chip production.

Bringing 40% of Taiwanā€™s chip supply chain and production to the U.S.

The U.S.ā€“Taiwan trade agreement includes $250B in direct U.S. investments by TSMC and other Taiwanese companies across advanced semiconductors, energy, and AI, plus up to $250B in credit guarantees for additional IC supply chain expansion. Reciprocal tariffs are capped at 15%, with potential Section 232 exemptions for U.S.-based investments.

Ramping up volumes of chips made in the U.S.

The White House announced a 25% tariff on select advanced computing and AI chips, including Nvidiaā€™s H200 and AMDā€™s MI325X, while excluding chips imported for U.S. data centers, startups, consumer and industrial applications, and public sector use, with further exemptions possible.

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