Happy Monday! Hereās whatās inside this weekās newsletter:
Deep dive: The third part of our advanced packaging series examines how rising chiplet power and 3D stacking create thermal bottlenecks, and the new materials and cooling technologies needed to address them.
Spotlights: Appleās new M5 chip, delivering a major leap in AI performance and efficiency, and Nvidiaās growing role as a leading investor in the AI ecosystem.
Headlines: Major semiconductor updates from Intel, Arm, and AMD, breakthroughs in quantum and photonics from China and Europe, advances in neuromorphic, and record data center and infrastructure deals.
Readings: Shifts in the memory market, advances in semiconductor metrology, broadband quantum memory, edge photonic circuits, neuromorphic hardware trends, and new approaches to cooling and power efficiency in AI data centers.
Funding news: A quieter week overall, with fewer large rounds than usual. Activity centered on early-stage quantum and photonics startups, while semiconductors led in scale with Tachyumās $220M Series C.
Bonus: Key highlights from the Open Compute Project (OCP) Summit in San Jose, where open standards and modular architectures are setting the direction for next-generation AI infrastructure.
Check out our website for the Future of Computing Conference in Paris on November 6 to see the full agenda and pitching startups. If youād like to join us, you can sign up here ā¤ļø
Deep Dive: Advanced Packaging Pt. 3 - The Thermal Management Bottleneck
This deep dive is the third part of our exploration of advanced packaging. In the first edition, we covered the fundamentals: why packaging matters, what drives its adoption, and the most recent innovations in the field.
The second part examined how advanced packages are organized through 2D, 2.5D, and 3D integration, along with the role of interposers in enabling these dense chip-to-chip links.
With part of the architectural complexity now established, this part turns to thermal management: the physical constraint that increasingly defines what advanced packaging can realistically support. As chiplets stack and power densities rise, managing heat has become a primary limiter, not a secondary engineering task.
Thermal Challenges
Rising Chiplet Power Density: Increased transistor concentration within individual chiplets creates localized heat, shifting the challenge from overall package power to concentrated thermal hotspots.
Stacking and Reduced Heat Paths: Vertical die stacking limits surface area for heat extraction and increases thermal resistance to the cold plate, resulting in higher thermal density within the stack.
Heterogeneous Layout Tradeoffs: Integrated compute, memory, and power IP produce different thermal profiles, requiring tradeoffs, as improving thermals in one region can worsen conditions in another under variable workloads.
High-Speed IO in Base Dies: Higher power densities in IO blocks (input/output interfaces), when placed in base die layers, face increased dissipation difficulty due to interconnect and dielectric barriers.
Thinner Silicon and Interface Sensitivity: Silicon thinning (from roughly 700 µm to 50 µm) reduces lateral heat spreading and increases sensitivity to thermal defects.
Thermal Requirements
Thermal Interface Materials (āTIMsā): Current efforts focus on lowering thermal resistance at critical interfaces within the package. Looking ahead, requirements include up to a 50% reduction and a transition toward embedded cooling without traditional interface materials.
Heat Spreaders: Materials with higher thermal conductivity than copper are needed, while maintaining manufacturability. Over time, these spreaders must integrate directly into stacked architectures rather than sitting above them.
Cooling Solutions: System-level cooling is shifting from air-based CRAC (Computer Room Air Conditioning) units toward direct liquid cold plates at the package. Future approaches include above-ambient and sub-ambient cooling, ultimately requiring heat removal from within stacked dies.
Metrology: Future thermal solutions require non-destructive measurement with approximately 3 °C accuracy to characterize thermal behavior across bonded layers, including x-y-z conductivity (across horizontal and vertical heat paths).
Modeling: Multiphysics thermal modeling is needed to simulate conductivity and heat flow in stacked architectures, capturing material interactions and enabling design validation before fabrication.
Thermal management has shifted from a packaging afterthought to a determining factor in system architecture. As transistor counts and stack depths increase, managing localized heat becomes as critical as delivering power or routing signals. Future compute systems will depend on co-design of cooling, materials, and workload profiles, making thermals a central pillar of advanced packaging.
Source: Chapter 7 ā Advanced Packaging and Heterogeneous Integration (MAPT, 2025)
Spotlights
āApple today announced M5, delivering the next big leap in AI performance and advances to nearly every aspect of the chip. Built using third-generation 3-nanometer technology, M5 introduces a next-generation 10-core GPU architecture with a Neural Accelerator in each core, enabling GPU-based AI workloads to run dramatically faster, with over 4x the peak GPU compute performance compared to M4. The GPU also offers enhanced graphics capabilities and third-generation ray tracing that combined deliver a graphics performance that is up to 45 percent higher than M4. M5 features the worldās fastest performance core, with up to a 10-core CPU made up of six efficiency cores and up to four performance cores.ā
š¤ Nvidiaās AI Empire: A Look at Its Top Startup Investments (TechCrunch)
The article outlines how Nvidia has rapidly expanded its role as an AI investor, using its record profits to take stakes in leading startups. It explains Nvidiaās stated goal of backing āgame changers and market makersā and lists the major million- to billion-dollar rounds it has joined since 2023 including xAI, Mistral AI, Reflection AI, Thinking Machines Lab, and Figure AI.
Headlines
Last weekās headlines featured major semiconductor and AI hardware moves, breakthroughs in quantum and photonic computing, advances in neuromorphic systems, and record deals reshaping global data center infrastructure.
𦾠Semiconductors
Super-thin semiconductor overcomes trade-off between speed and thermal stability (TechXplore)
Scientists smash record in stacking semiconductor transistors for large-area electronics (EurekAlert)
Arm and Meta Deepen Strategic Partnership to Power the Next Era of AI, from Megawatts to Milliwatts, for Billions Worldwide (Arm)
Oracle and AMD Expand Partnership to Help Customers Achieve Next-Generation AI Scale (AMD)
Intel to Expand AI Accelerator Portfolio with New GPU (Intel)
OpenAI and Broadcom partner on AI hardware (TechCrunch)
āļø Quantum
China Mass Produces Worldās First Four-Channel Photon Detector in October 2025 (Quantum Zeitgeist)
Quantum Computers Demonstrate Noise-Induced Discrete Time Crystals and Boundary-Protected Thermalization Slowdown (Quantum Zeitgeist)
New Low-Cost, Efficient Single-Photon Source for Powering Future Quantum Internet (The Quantum Insider)
China Opens Its Superconducting Quantum Computer for Commercial Use (The Quantum Insider)
Researchers Achieve Atomic-Scale Control of Quantum State Manipulation (Phys.org)
Anomalous Metal Sheds Light on 'Impossible' State Between Superconductivity and Insulation (Phys.org)
ā”ļø Photonic / Optical
Photonica 2025: Showcasing Europeās brightest photonics startups in Munich (EU-Startups)
ANELLOās silicon photonics optical gyroscope is enabling GPS-free navigation (GPS World)
š§ Neuromorphic
Scientists Create Nanofluidic Chip with 'Brain-like' Memory Pathways (Phys.org)
Resonate-and-fire Photonic-Electronic Spiking Neurons Enable Ultrafast, Energy-Efficient Neuromorphic Processing (Quantum Zeitgeist)
Mercedes-Benz Vision Iconic Breaks Cover, Has Level 4 Automation, Neuromorphic Computing (Autoevolution)
š„ Data Centers
Infineon Advances Leading-Edge 800 Volt AI Data Center Power Architecture (Infineon)
Nscale eyes IPO amid fresh $14 billion deal with Microsoft (CNBC)
Aligned Data Centers sold to BlackRock and MGX in record-breaking $40 bn deal (Data Center Dynamics)
How Starcloud Is Bringing Data Centers to Outer Space (NVIDIA)
And again: Read more about Starcloud in our recent interview!
š” Networking
Broadcom Introduces Industryās First 800G AI Ethernet NIC (Broadcom)
Broadcom Introduces Industryās First WiFi-8 Silicon Ecosystem Powering the AI Era (Broadcom)
NVIDIA Spectrum-X Ethernet Switches Speed Up Networks for Meta and Oracle (NVIDIA)
Upscale AI Unveils SkyHammer Architecture (Upscale AI)
š¤ AI
Anthropic aims to nearly triple annualized revenue in 2026 (Reuters)
Readings
This weekās reading list covers shifts in the memory market, advances in semiconductor metrology, broadband quantum memory, edge photonic circuits, neuromorphic market trends, and new approaches to power and cooling in AI data centers.
𦾠Semiconductors
Samsung Reclaims Global Memory Market Top Spot in Q3 2025 Driven by Robust DRAM, NAND Demand (Counterpoint Research) (13 mins)
Metrologyās Growing Role in Reducing False Defects (Semiconductor Engineering) (19 mins)
Distinctive features of structural evolution and thermodynamic response in wide-bandgap semiconductors driven by intense electronic excitation (ScienceDirect) (12 mins)
Ranked: The Top U.S. Semiconductor Companies by Market Cap (Visual Capitalist) (5 mins)
āļø Quantum
Fiber-coupled broadband quantum memory for polarization-encoded photonic qubits (Nature Quantum Information) (43 mins)
Rare-Earth Minerals and Quantum Computing: How Secure Are the Supply Chains? (The Quantum Insider) (17 mins)
ā”ļø Photonic / Optical
Frequency-modulated high-power photonic-crystal surface-emitting lasers for long-distance coherent free-space optical communications (Nature Photonics) (36 mins)
What are the applications for photonic integrated circuits on the edge? (EE World Online) (9 mins)
š§ Neuromorphic
Global Neuromorphic Hardware Market Size, Future Outlook By 2025-2034 (Market.us) (24 mins)
š„ Data Centers
Two-Phase Liquid Cooling: The Future of High-End GPUs (IDTechEx) (6 mins)
Data Centers Boost Voltage For Higher Efficiency (Semiconductor Engineering) (13 mins)
Are Flow Batteries the Answer for Data Center Energy Storage Needs? (Data Center Dynamics) (9 mins)
Improving AI Efficiency in Data Centres (Power Dynamic Response) (23 mins)
Funding News
Last weekās financings were concentrated in quantum and semiconductors with fewer large-scale rounds than usual. Quantum saw a series of early-stage rounds, while semiconductors dominated in scale with Tachyumās $220M Series C.
Amount | Name | Round | Category |
|---|---|---|---|
ā¬2M | Quantum | ||
ā¬7.5M | Quantum | ||
ā¬8M | Quantum | ||
$11M | Semiconductors | ||
$30M | Photonics | ||
$40M | Networking | ||
$220M | Semiconductors |
Bonus: Highlights from the Open Compute Project (OCP) Summit
This weekās OCP Summit in San Jose showcased how open hardware standards are now guiding the future of AI infrastructure. Instead of proprietary systems, the industry is aligning around shared blueprints for rack power, chiplet integration, and Ethernet-based interconnects. Below are the key developments that signal where hyperscale infrastructure is heading:
Open Standards & Infrastructure Blueprints
Realizing the Open Data Center Ecosystem Vision (Open Compute Project)
Introducing eSun: Advancing Ethernet for Scale-Up AI Infrastructure at OCP (Open Compute Project)
Chiplet & Modular Silicon Ecosystem
Open Compute Project Expands Open Chiplet Economy Ecosystem (Open Compute Project)
Power, Racks & Efficiency Platforms
AMD Showcases āHeliosā Rack-Scale Platform Built on the Open Compute Project Open Rack for AI (AMD)




